Design and implementation of BeiDou signal fast acquisition algorithm based on FPGA+DSP

Design and implementation of BeiDou signal fast acquisition algorithm based on FPGA+DSP

In BeiDou satellite receiver, a fast BeiDou signal acquisition algorithm based on coherent down-sampling was proposed to solve the problem that the large amount of data to be processed by the Fourier transform affects the acquisition speed of satellite signals in the traditional parallel frequency a...

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Bibliographic Details
Main Authors: Chang GAO, Zewang CHEN, Qingxi ZENG, Chade LYU
Format: Article
Language:zho
Published: Hebei University of Science and Technology 2020-12-01
Series:Journal of Hebei University of Science and Technology
Subjects:
testing and measuring instruments; beidou; fast acquisition; coherent down-sampling; field-programmable gate arrays(fpga); digital signal processor(dsp)
Online Access:http://xuebao.hebust.edu.cn/hbkjdx/ch/reader/create_pdf.aspx?file_no=b202006001&flag=1&journal_

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http://xuebao.hebust.edu.cn/hbkjdx/ch/reader/create_pdf.aspx?file_no=b202006001&flag=1&journal_

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