FPGA-Based Configurable Systolic Architecture for Window-Based Image Processing

FPGA-Based Configurable Systolic Architecture for Window-Based Image Processing

<p/> <p>Image processing requires more computational power and data throughput than most conventional processors can provide. Designing specific hardware can improve execution time and achieve better performance per unit of silicon area. A field-programmable-gate-array- (FPGA-) based con...

Full description

Bibliographic Details
Main Authors: Torres-Huitzil C&#233;sar, Arias-Estrada Miguel
Format: Article
Language:English
Published: SpringerOpen 2005-01-01
Series:EURASIP Journal on Advances in Signal Processing
Subjects:
FPGA
configurable system
real time
window-based image processing
systolic array
Online Access:http://dx.doi.org/10.1155/ASP.2005.1024

Internet

http://dx.doi.org/10.1155/ASP.2005.1024

Similar Items