A 1.15 μW 200 kS/s 10-b Monotonic SAR ADC Using Dual On-Chip Calibrations and Accuracy Enhancement Techniques

A 1.15 μW 200 kS/s 10-b Monotonic SAR ADC Using Dual On-Chip Calibrations and Accuracy Enhancement Techniques

Herein, we present an energy efficient successive-approximation-register (SAR) analog-to-digital converter (ADC) featuring on-chip dual calibration and various accuracy-enhancement techniques. The dual calibration technique is realized in an energy and area-efficient manner for comparator offset cal...

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Bibliographic Details
Main Authors: Jae-Hun Lee, Dasom Park, Woojin Cho, Huu Nhan Phan, Cong Luong Nguyen, Jong-Wook Lee
Format: Article
Language:English
Published: MDPI AG 2018-10-01
Series:Sensors
Subjects:
analog-to-digital converter
successive approximation register
comparator offset
capacitor mismatch calibration
Online Access:http://www.mdpi.com/1424-8220/18/10/3486

Internet

http://www.mdpi.com/1424-8220/18/10/3486

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