Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors

In this paper, we proposed a novel saddle type FinFET (S-FinFET) to effectively solve problems occurring under the capacitor node of a dynamic random-access memory (DRAM) cell and showed how its structure was superior to conventional S-FinFETs in terms of short channel effect (SCE), subthreshold slo...

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Main Authors:	Young Kwon Kim, Jin Sung Lee, Geon Kim, Taesik Park, Hui Jung Kim, Young Pyo Cho, Young June Park, Myoung Jin Lee
Format:	Article
Language:	English
Published:	MDPI AG 2018-12-01
Series:	Electronics
Subjects:	gate-induced drain leakage (GIDL) drain-induced barrier lowering (DIBL) recessed channel array transistor (RCAT) on-current (Ion) off-current (Ioff) subthreshold slope (SS) threshold voltage (VTH) saddle FinFET (S-FinFET) potential drop width (PDW) shallow trench isolation (STI) source/drain (S/D)
Online Access:	http://www.mdpi.com/2079-9292/8/1/8

id	doaj-647abce0a7b843a19a02105e3a1587e4
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spelling	doaj-647abce0a7b843a19a02105e3a1587e42020-11-25T00:14:40ZengMDPI AGElectronics2079-92922018-12-0181810.3390/electronics8010008electronics8010008Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell TransistorsYoung Kwon Kim0Jin Sung Lee1Geon Kim2Taesik Park3Hui Jung Kim4Young Pyo Cho5Young June Park6Myoung Jin Lee7School of Electronics and Computer Engineering, Chonnam National University, Gwangju 500-757, KoreaSchool of Electronics and Computer Engineering, Chonnam National University, Gwangju 500-757, KoreaSchool of Electronics and Computer Engineering, Chonnam National University, Gwangju 500-757, KoreaDepartment of Electrical and Control Engineering, Mokpo National University, Jeollanam-do 534-729, KoreaSchool of Electrical Engineering, Seoul National University, Seoul 151-742, KoreaThe KEPCO Research Institute, Daejeon 305-760, KoreaSchool of Electrical Engineering, Seoul National University, Seoul 151-742, KoreaSchool of Electronics and Computer Engineering, Chonnam National University, Gwangju 500-757, KoreaIn this paper, we proposed a novel saddle type FinFET (S-FinFET) to effectively solve problems occurring under the capacitor node of a dynamic random-access memory (DRAM) cell and showed how its structure was superior to conventional S-FinFETs in terms of short channel effect (SCE), subthreshold slope (SS), and gate-induced drain leakage (GIDL). The proposed FinFET exhibited four times lower Ioff than modified S-FinFET, called RFinFET, with more improved drain-induced barrier lowering (DIBL) characteristics, while minimizing Ion reduction compared to RFinFET. Our results also confirmed that the proposed device showed improved drain-induced barrier lowering (DIBL) and Ioff characteristics as gate channel length decreased.http://www.mdpi.com/2079-9292/8/1/8gate-induced drain leakage (GIDL)drain-induced barrier lowering (DIBL)recessed channel array transistor (RCAT)on-current (Ion)off-current (Ioff)subthreshold slope (SS)threshold voltage (VTH)saddle FinFET (S-FinFET)potential drop width (PDW)shallow trench isolation (STI)source/drain (S/D)
collection	DOAJ
language	English
format	Article
sources	DOAJ
author	Young Kwon Kim Jin Sung Lee Geon Kim Taesik Park Hui Jung Kim Young Pyo Cho Young June Park Myoung Jin Lee
spellingShingle	Young Kwon Kim Jin Sung Lee Geon Kim Taesik Park Hui Jung Kim Young Pyo Cho Young June Park Myoung Jin Lee Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors Electronics gate-induced drain leakage (GIDL) drain-induced barrier lowering (DIBL) recessed channel array transistor (RCAT) on-current (Ion) off-current (Ioff) subthreshold slope (SS) threshold voltage (VTH) saddle FinFET (S-FinFET) potential drop width (PDW) shallow trench isolation (STI) source/drain (S/D)
author_facet	Young Kwon Kim Jin Sung Lee Geon Kim Taesik Park Hui Jung Kim Young Pyo Cho Young June Park Myoung Jin Lee
author_sort	Young Kwon Kim
title	Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors
title_short	Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors
title_full	Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors
title_fullStr	Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors
title_full_unstemmed	Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors
title_sort	partial isolation type saddle-finfet(pi-finfet) for sub-30 nm dram cell transistors
publisher	MDPI AG
series	Electronics
issn	2079-9292
publishDate	2018-12-01
description	In this paper, we proposed a novel saddle type FinFET (S-FinFET) to effectively solve problems occurring under the capacitor node of a dynamic random-access memory (DRAM) cell and showed how its structure was superior to conventional S-FinFETs in terms of short channel effect (SCE), subthreshold slope (SS), and gate-induced drain leakage (GIDL). The proposed FinFET exhibited four times lower Ioff than modified S-FinFET, called RFinFET, with more improved drain-induced barrier lowering (DIBL) characteristics, while minimizing Ion reduction compared to RFinFET. Our results also confirmed that the proposed device showed improved drain-induced barrier lowering (DIBL) and Ioff characteristics as gate channel length decreased.
topic	gate-induced drain leakage (GIDL) drain-induced barrier lowering (DIBL) recessed channel array transistor (RCAT) on-current (Ion) off-current (Ioff) subthreshold slope (SS) threshold voltage (VTH) saddle FinFET (S-FinFET) potential drop width (PDW) shallow trench isolation (STI) source/drain (S/D)
url	http://www.mdpi.com/2079-9292/8/1/8
work_keys_str_mv	AT youngkwonkim partialisolationtypesaddlefinfetpifinfetforsub30nmdramcelltransistors AT jinsunglee partialisolationtypesaddlefinfetpifinfetforsub30nmdramcelltransistors AT geonkim partialisolationtypesaddlefinfetpifinfetforsub30nmdramcelltransistors AT taesikpark partialisolationtypesaddlefinfetpifinfetforsub30nmdramcelltransistors AT huijungkim partialisolationtypesaddlefinfetpifinfetforsub30nmdramcelltransistors AT youngpyocho partialisolationtypesaddlefinfetpifinfetforsub30nmdramcelltransistors AT youngjunepark partialisolationtypesaddlefinfetpifinfetforsub30nmdramcelltransistors AT myoungjinlee partialisolationtypesaddlefinfetpifinfetforsub30nmdramcelltransistors
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Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors

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