P4 to FPGA-A Fast Approach for Generating Efficient Network Processors

P4 to FPGA-A Fast Approach for Generating Efficient Network Processors

This paper presents a framework for converting P4 programs to VHDL and then implementing them on Field-Programmable Gate Array (FPGA) platforms. In this framework, a match-action-based hardware architecture is introduced with clearly designed components, which correspond to the described functionali...

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Bibliographic Details
Main Authors: Zhuang Cao, Huayou Su, Qianming Yang, Junzhong Shen, Mei Wen, Chunyuan Zhang
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Access
Subjects:
P4
VHDL
FPGA
template
network processor
Online Access:https://ieeexplore.ieee.org/document/8976091/

Internet

https://ieeexplore.ieee.org/document/8976091/

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