Second-order sigma-delta modulator in standard cmos technology
As a part of wider project sigma-delta modulator was designed. It represents an A/D part of a power meter IC. Requirements imposed were: SNDR and dynamic range > 50 dB for maximum input swing of 250 mV differential at 50 Hz. Over sampling ratio is 128 with clock frequency of 524288 Hz which gives...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Faculty of Technical Sciences in Cacak
2004-01-01
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| Series: | Serbian Journal of Electrical Engineering |
| Subjects: | |
| Online Access: | http://www.doiserbia.nb.rs/img/doi/1451-4869/2004/1451-48690403037M.pdf |