A 10-Bits 50-MS/s SAR ADC Based on Area-Efficient and Low-Energy Switching Scheme
This paper presents a 10-bits successive approximation register analog-to-digital converter (SAR ADC) for low-power applications. The input signals are multiplied by two because the dual sampling technique is used during the sampling phase. In this design, a comparator circuit with four input termin...
Main Authors: | , |
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Format: | Article |
Language: | English |
Published: |
IEEE
2020-01-01
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Series: | IEEE Access |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/8981911/ |