CASPER: Embedding Power Estimation and Hardware-Controlled Power Management in a Cycle-Accurate Micro-Architecture Simulation Platform for Many-Core Multi-Threading Heterogeneous Processors

CASPER: Embedding Power Estimation and Hardware-Controlled Power Management in a Cycle-Accurate Micro-Architecture Simulation Platform for Many-Core Multi-Threading Heterogeneous Processors

Despite the promising performance improvement observed in emerging many-core architectures in high performance processors, high power consumption prohibitively affects their use and marketability in the low-energy sectors, such as embedded processors, network processors and application specific inst...

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Bibliographic Details
Main Authors: Arun Ravindran, Vinay Vijendra Kumar Lakshmi, Guangyi Cao, Rohith Tenneti, Arindam Mukherjee, Bharat S. Joshi, Kushal Datta
Format: Article
Language:English
Published: MDPI AG 2012-02-01
Series:Journal of Low Power Electronics and Applications
Subjects:
simulation
processor architectures
modeling
power consumption
performance evaluation and estimation
dynamic power management unit
hardware based power management
power estimation
Online Access:http://www.mdpi.com/2079-9268/2/1/30/

Internet

http://www.mdpi.com/2079-9268/2/1/30/

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