High speed video recording system on a chip for detonation jet engine testing
This article describes system on a chip development for high speed video recording purposes. Current research was started due to difficulties in selection of FPGAs and CPUs which include wide bandwidth, high speed and high number of multipliers for real time signal analysis implementation. Current t...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
EDP Sciences
2018-01-01
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| Series: | MATEC Web of Conferences |
| Online Access: | https://doi.org/10.1051/matecconf/201815801028 |