APA (7th ed.) Citation

Suzuki, A., Morie, T., & Tamukoh, H. (2018). A shared synapse architecture for efficient FPGA implementation of autoencoders. Public Library of Science (PLoS).

Chicago Style (17th ed.) Citation

Suzuki, Akihiro, Takashi Morie, and Hakaru Tamukoh. A Shared Synapse Architecture for Efficient FPGA Implementation of Autoencoders. Public Library of Science (PLoS), 2018.

MLA (8th ed.) Citation

Suzuki, Akihiro, et al. A Shared Synapse Architecture for Efficient FPGA Implementation of Autoencoders. Public Library of Science (PLoS), 2018.