PERFORMANCE ANALYSIS OF POWER GATING TECHNIQUES IN 4-BIT SISO SHIFT REGISTER CIRCUITS
The last few years have witnessed great deal of research activities in the area of reversible logic; the intrinsic functionality to reduce the power dissipation that has been the main requirement in the low power digital circuit design has garnered more attraction to this field. In this paper variou...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Taylor's University
2017-12-01
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| Series: | Journal of Engineering Science and Technology |
| Subjects: | |
| Online Access: | http://jestec.taylors.edu.my/Vol%2012%20issue%2012%20December%202017/12_12_7.pdf |