Implementation and Analysis of a 15-Level Inverter Topology With Reduced Switch Count
Multilevel inverters remain an area of research interest due to the superior performance against a two-level counterpart. Reducing the switch count and stress on the power electronic switches while maintaining a sinusoidal stepped output remains a challenge. A multilevel inverter topology has been p...
Main Authors: | , , , , |
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Format: | Article |
Language: | English |
Published: |
IEEE
2021-01-01
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Series: | IEEE Access |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/9373402/ |