Design of a Low - power CMOS Level Shifter for Low - delay SoCs in Silterra 0.13 μm CMOS Process
Main Authors: | , , , , |
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Format: | Article |
Language: | English |
Published: |
Eastern Macedonia and Thrace Institute of Technology
2017-08-01
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Series: | Journal of Engineering Science and Technology Review |
Online Access: | http://www.jestr.org/downloads/Volume10Issue4/fulltext21042017.pdf |