VERIFICATION OF INTEGRATED CIRCUIT BEHAVIORAL MODELS BY PROGRAMMABLE LOGIC

VERIFICATION OF INTEGRATED CIRCUIT BEHAVIORAL MODELS BY PROGRAMMABLE LOGIC

Subject of Research. The paper considers the research of verification methods for behavioral models by the field-programmed gate array (FPGA). Applying verification with FPGA gives the possibility to identify functional errors, which are not determined at the verification phase of the traditional in...

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Bibliographic Details
Main Authors: N. M. Chernetskaya, A. A. Mikhteeva, N. N. Nevirkovets, D. V. Kostygov, Y. V. Belyaev
Format: Article
Language:English
Published: Saint Petersburg National Research University of Information Technologies, Mechanics and Optics (ITMO University) 2018-05-01
Series:Naučno-tehničeskij Vestnik Informacionnyh Tehnologij, Mehaniki i Optiki
Subjects:
integrated circuits
FPGA
verification
prototyping
behavioral model
interface
Online Access:http://ntv.ifmo.ru/file/article/17793.pdf

Internet

http://ntv.ifmo.ru/file/article/17793.pdf

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