Low Power Clock Network Design
Power is a primary concern in modern circuits. Clock distribution networks, in particular, are an essential element of a synchronous digital circuit and a significant power consumer. Clock distribution networks are subject to clock skew due to process, voltage, and temperature (PVT) variations and l...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2011-05-01
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| Series: | Journal of Low Power Electronics and Applications |
| Subjects: | |
| Online Access: | http://www.mdpi.com/2079-9268/1/1/219/ |