Efficient programmable power‐of‐two scaler for the three‐moduli set {2

Efficient programmable power‐of‐two scaler for the three‐moduli set {2

Scaling is an important operation because of the iterative nature of arithmetic processes in digital signal processors (DSPs). In residue number system (RNS)–based DSPs, scaling represents a performance bottleneck based on the complexity of inter‐modulo operations. To design an efficient RNS scaler...

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Bibliographic Details
Main Authors: MohammadReza Taheri, Keivan Navi, Amir Sabbagh Molahosseini
Format: Article
Language:English
Published: Electronics and Telecommunications Research Institute (ETRI) 2020-05-01
Series:ETRI Journal
Subjects:
asic
computer arithmetic
digital signal processing
programmable scaler
residue number system (rns) scaler
vlsi design
Online Access:https://doi.org/10.4218/etrij.2018-0408

Internet

https://doi.org/10.4218/etrij.2018-0408

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