Area-Efficient Post-Processing Circuits for Physically Unclonable Function with 2-Mpixel CMOS Image Sensor

Area-Efficient Post-Processing Circuits for Physically Unclonable Function with 2-Mpixel CMOS Image Sensor

In order to realize image information security starting from the data source, challenge–response (CR) device authentication, based on a Physically Unclonable Function (PUF) with a 2 Mpixel CMOS image sensor (CIS), is studied, in which variation of the transistor in the pixel array is utilized. As ea...

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Bibliographic Details
Main Authors: Shunsuke Okura, Masanori Aoki, Tatsuya Oyama, Masayoshi Shirahata, Takeshi Fujino, Kenichiro Ishikawa, Isao Takayanagi
Format: Article
Language:English
Published: MDPI AG 2021-09-01
Series:Sensors
Subjects:
imaging
integrated circuit reliability
CMOS image sensors
IoT
hardware security
PUF
Online Access:https://www.mdpi.com/1424-8220/21/18/6079

Internet

https://www.mdpi.com/1424-8220/21/18/6079

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