Quenching Circuit and SPAD Integrated in CMOS 65 nm with 7.8 ps FWHM Single Photon Timing Resolution
This paper presents a new quenching circuit (QC) and single photon avalanche diode (SPAD) implemented in TSMC CMOS 65 nm technology. The QC was optimized for single photon timing resolution (SPTR) with a view to an implementation in a 3D digital SiPM. The presented QC has a timing jitter of 4 ps ful...
Main Authors: | , , , , , , |
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Format: | Article |
Language: | English |
Published: |
MDPI AG
2018-09-01
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Series: | Instruments |
Subjects: | |
Online Access: | http://www.mdpi.com/2410-390X/2/4/19 |