Quenching Circuit and SPAD Integrated in CMOS 65 nm with 7.8 ps FWHM Single Photon Timing Resolution

Quenching Circuit and SPAD Integrated in CMOS 65 nm with 7.8 ps FWHM Single Photon Timing Resolution

This paper presents a new quenching circuit (QC) and single photon avalanche diode (SPAD) implemented in TSMC CMOS 65 nm technology. The QC was optimized for single photon timing resolution (SPTR) with a view to an implementation in a 3D digital SiPM. The presented QC has a timing jitter of 4 ps ful...

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Bibliographic Details
Main Authors: Frédéric Nolet, Samuel Parent, Nicolas Roy, Marc-Olivier Mercier, Serge A. Charlebois, Réjean Fontaine, Jean-Francois Pratte
Format: Article
Language:English
Published: MDPI AG 2018-09-01
Series:Instruments
Subjects:
single photon avalanche diode
quenching circuit
single photon timing resolution
SiPM
3D digital silicon photomultiplier
3D integrated detector
time-of-flight
positron emission tomography
Online Access:http://www.mdpi.com/2410-390X/2/4/19

Internet

http://www.mdpi.com/2410-390X/2/4/19

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