Stochastic Computing Improves the Timing-Error Tolerance and Latency of Turbo Decoders: Design Guidelines and Tradeoffs

Stochastic Computing Improves the Timing-Error Tolerance and Latency of Turbo Decoders: Design Guidelines and Tradeoffs

Stochastic computing has been recently proposed for the hardware implementation of both low-density parity-check (LDPC) decoders and turbo decoders, which facilitate near-optimal error correction capabilities in wireless communication applications. Previous contributions have demonstrated that stoch...

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Bibliographic Details
Main Authors: Isaac Perez-Andrade, Shida Zhong, Robert G. Maunder, Bashir M. Al-Hashimi, Lajos Hanzo
Format: Article
Language:English
Published: IEEE 2016-01-01
Series:IEEE Access
Subjects:
ASIC
fault tolerance
low-latency
power supply variation
stochastic computing
timing errors
Online Access:https://ieeexplore.ieee.org/document/7403849/

Internet

https://ieeexplore.ieee.org/document/7403849/

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