Benchmarking of FinFET, Nanosheet, and Nanowire FET Architectures for Future Technology Nodes

Benchmarking of FinFET, Nanosheet, and Nanowire FET Architectures for Future Technology Nodes

Nanosheet (NS) and nanowire (NW) FET architectures scaled to a gate length (L<sub>G</sub>) of 16 nm and below are benchmarked against equivalent FinFETs. The device performance is predicted using a 3D finite element drift-diffusion/Monte Carlo simulation toolbox with integrated 2D Schro&...

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Bibliographic Details
Main Authors: Daniel Nagy, Gabriel Espineira, Guillermo Indalecio, Antonio J. Garcia-Loureiro, Karol Kalna, Natalia Seoane
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Access
Subjects:
Monte Carlo
Schrödinger quantum correction
FinFET
nanowire
nanosheet
Online Access:https://ieeexplore.ieee.org/document/9036890/

Internet

https://ieeexplore.ieee.org/document/9036890/

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