Fast Logic Function Extraction of LUT from Bitstream in Xilinx FPGA
This paper presents a fast method to extract logic functions of look-up tables (LUTs) from a bitstream in Xilinx FPGAs. In general, FPGAs utilize LUTs as a primary resource to realize a logic function, and a typical <i>N</i>-input LUT comprises 2<i>N</i> 1-bit SRAM and <i&...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2020-07-01
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| Series: | Electronics |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2079-9292/9/7/1132 |