Planar-Nothing On Insulator parasitic structure within a static induction transistor made by selective epitaxial growth
Power dissipation obstacle in electronic devices is strongly related to their internal breakdown mechanism. The Static Induction Transistor optimization imposes to reach p-gate regions as deep as vertical as possible. These objectives can be achieved using Selective Epitaxial Growth technology, so t...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
KeAi Communications Co., Ltd.
2019-07-01
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| Series: | Solid State Electronics Letters |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S2589208819300183 |