Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs

Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs

A 16-nm-L<sub>g</sub> p-type Gate-all-around (GAA) silicon nanowire (Si NW) metal oxide semiconductor field effect transistor (MOSFET) was fabricated based on the mainstream bulk fin field-effect transistor (FinFET) technology. The temperature dependence of electrical characteristics for...

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Main Authors: Jie Gu, Qingzhu Zhang, Zhenhua Wu, Jiaxin Yao, Zhaohao Zhang, Xiaohui Zhu, Guilei Wang, Junjie Li, Yongkui Zhang, Yuwei Cai, Renren Xu, Gaobo Xu, Qiuxia Xu, Huaxiang Yin, Jun Luo, Wenwu Wang, Tianchun Ye
Format: Article
Language:English
Published: MDPI AG 2021-01-01
Series:Nanomaterials
Subjects:
gate-all-around
Si nanowire
cryo-CMOS
one-dimensional hole transport
Online Access:https://www.mdpi.com/2079-4991/11/2/309
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spelling doaj-abc7abddcd4f42e4989faa93ad80468b2021-01-27T00:00:09ZengMDPI AGNanomaterials2079-49912021-01-011130930910.3390/nano11020309Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETsJie Gu0Qingzhu Zhang1Zhenhua Wu2Jiaxin Yao3Zhaohao Zhang4Xiaohui Zhu5Guilei Wang6Junjie Li7Yongkui Zhang8Yuwei Cai9Renren Xu10Gaobo Xu11Qiuxia Xu12Huaxiang Yin13Jun Luo14Wenwu Wang15Tianchun Ye16Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaKey Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences (CAS), Beijing 100029, ChinaA 16-nm-L<sub>g</sub> p-type Gate-all-around (GAA) silicon nanowire (Si NW) metal oxide semiconductor field effect transistor (MOSFET) was fabricated based on the mainstream bulk fin field-effect transistor (FinFET) technology. The temperature dependence of electrical characteristics for normal MOSFET as well as the quantum transport at cryogenic has been investigated systematically. We demonstrate a good gate-control ability and body effect immunity at cryogenic for the GAA Si NW MOSFETs and observe the transport of two-fold degenerate hole sub-bands in the nanowire (110) channel direction sub-band structure experimentally. In addition, the pronounced ballistic transport characteristics were demonstrated in the GAA Si NW MOSFET. Due to the existence of spacers for the typical MOSFET, the quantum interference was also successfully achieved at lower bias.https://www.mdpi.com/2079-4991/11/2/309gate-all-aroundSi nanowirecryo-CMOSone-dimensional hole transport
collection DOAJ
language English
format Article
sources DOAJ
author Jie Gu
Qingzhu Zhang
Zhenhua Wu
Jiaxin Yao
Zhaohao Zhang
Xiaohui Zhu
Guilei Wang
Junjie Li
Yongkui Zhang
Yuwei Cai
Renren Xu
Gaobo Xu
Qiuxia Xu
Huaxiang Yin
Jun Luo
Wenwu Wang
Tianchun Ye
spellingShingle Jie Gu
Qingzhu Zhang
Zhenhua Wu
Jiaxin Yao
Zhaohao Zhang
Xiaohui Zhu
Guilei Wang
Junjie Li
Yongkui Zhang
Yuwei Cai
Renren Xu
Gaobo Xu
Qiuxia Xu
Huaxiang Yin
Jun Luo
Wenwu Wang
Tianchun Ye
Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs
Nanomaterials
gate-all-around
Si nanowire
cryo-CMOS
one-dimensional hole transport
author_facet Jie Gu
Qingzhu Zhang
Zhenhua Wu
Jiaxin Yao
Zhaohao Zhang
Xiaohui Zhu
Guilei Wang
Junjie Li
Yongkui Zhang
Yuwei Cai
Renren Xu
Gaobo Xu
Qiuxia Xu
Huaxiang Yin
Jun Luo
Wenwu Wang
Tianchun Ye
author_sort Jie Gu
title Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs
title_short Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs
title_full Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs
title_fullStr Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs
title_full_unstemmed Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs
title_sort cryogenic transport characteristics of p-type gate-all-around silicon nanowire mosfets
publisher MDPI AG
series Nanomaterials
issn 2079-4991
publishDate 2021-01-01
description A 16-nm-L<sub>g</sub> p-type Gate-all-around (GAA) silicon nanowire (Si NW) metal oxide semiconductor field effect transistor (MOSFET) was fabricated based on the mainstream bulk fin field-effect transistor (FinFET) technology. The temperature dependence of electrical characteristics for normal MOSFET as well as the quantum transport at cryogenic has been investigated systematically. We demonstrate a good gate-control ability and body effect immunity at cryogenic for the GAA Si NW MOSFETs and observe the transport of two-fold degenerate hole sub-bands in the nanowire (110) channel direction sub-band structure experimentally. In addition, the pronounced ballistic transport characteristics were demonstrated in the GAA Si NW MOSFET. Due to the existence of spacers for the typical MOSFET, the quantum interference was also successfully achieved at lower bias.
topic gate-all-around
Si nanowire
cryo-CMOS
one-dimensional hole transport
url https://www.mdpi.com/2079-4991/11/2/309
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