An improved implementation of hierarchy array multiplier using CslA adder and full swing GDI logic
In this paper, an efficient implementation of a 16 bit array hierarchy multiplier using full swing Gate Diffusion Input (GDI) logic is discussed. Hierarchy multiplier is attractive because of its ability to carry the multiplication operation within one clock cycle. The existing hierarchical multipli...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
University of Banja Luka
2017-06-01
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| Series: | Electronics |
| Subjects: | |
| Online Access: | http://electronics.etfbl.net/journal/Vol21No1/xPaper_05.pdf |