Data Link Layer Processor for 100 Gbps Terahertz Wireless Communications in 28 nm CMOS Technology

Data Link Layer Processor for 100 Gbps Terahertz Wireless Communications in 28 nm CMOS Technology

In this paper, we show our 165 Gbps data link layer processor for wireless communication in the terahertz band. The design utilizes interleaved Reed-Solomon codes with dedicated link adaptation, fragmentation, aggregation, and hybrid-automatic-repeat-request. The main advantage is the low-chip area...

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Bibliographic Details
Main Authors: Lukasz Lopacinski, Miroslav Marinkovic, Goran Panic, Mohamed Hussein Eissa, Alireza Hasani, Karthik Krishnegowda, Rolf Kraemer
Format: Article
Language:English
Published: IEEE 2019-01-01
Series:IEEE Access
Subjects:
100 Gbps wireless
terahertz communication
Reed-Solomon coding
data link layer
Online Access:https://ieeexplore.ieee.org/document/8685101/

Internet

https://ieeexplore.ieee.org/document/8685101/

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