G-AETCAM: Gate-Based Area-Efficient Ternary Content-Addressable Memory on FPGA

G-AETCAM: Gate-Based Area-Efficient Ternary Content-Addressable Memory on FPGA

This paper presents a novel architecture for ternary content-addressable memory (TCAM), using G-AETCAM cells, which outputs the address of the provided input data. The proposed architecture is a matrix of G-AETCAM cells arranged in the form of rows and columns using flip-flop as a memory element and...

Full description

Bibliographic Details
Main Authors: Muhammad Irfan, Zahid Ullah
Format: Article
Language:English
Published: IEEE 2017-01-01
Series:IEEE Access
Subjects:
Content-addressable storage
field-programmable gate arrays
flip-flops
logic gates
memory
RAM-based TCAM
Online Access:https://ieeexplore.ieee.org/document/8049445/

Internet

https://ieeexplore.ieee.org/document/8049445/

Similar Items