Fabrication and Characterization of Stacked Poly-Si Nanosheet With Gate-All-Around and Multi-Gate Junctionless Field Effect Transistors

Fabrication and Characterization of Stacked Poly-Si Nanosheet With Gate-All-Around and Multi-Gate Junctionless Field Effect Transistors

Present work demonstrates the vertically double stacked nanosheet (NS) p-channel polycrystalline silicon (poly-Si) junctionless field-effect transistors (JL-FET) with tri-gate, omega-gate, and gate all around (GAA) structure. These structures offer more W<sub>eff</sub> per existing footp...

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Bibliographic Details
Main Authors: Meng-Ju Tsai, Kang-Hui Peng, Chong-Jhe Sun, Siao-Cheng Yan, Chieng-Chung Hsu, Yu-Ru Lin, Yu-Hsien Lin, Yung-Chun Wu
Format: Article
Language:English
Published: IEEE 2019-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Gate all around
junctionless
nanosheet
multi gate
stacked FET
Online Access:https://ieeexplore.ieee.org/document/8894119/

Internet

https://ieeexplore.ieee.org/document/8894119/

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