Alleviation of Negative-Bias Temperature Instability in Si p-FinFETs With ALD W Gate-Filling Metal by Annealing Process Optimization

Alleviation of Negative-Bias Temperature Instability in Si p-FinFETs With ALD W Gate-Filling Metal by Annealing Process Optimization

In this article, we present an experimental study on the impact of post-metallization annealing conditions on the negative-bias temperature instability (NBTI) of Si p-channel fin field-effect transistors (p-FinFETs) with atomic layer deposition tungsten (ALD W) as the gate-filling metal. The effects...

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Bibliographic Details
Main Authors: Longda Zhou, Qianqian Liu, Hong Yang, Zhigang Ji, Hao Xu, Guilei Wang, Eddy Simoen, Haojie Jiang, Ying Luo, Zhenzhen Kong, Guobin Bai, Jun Luo, Huaxiang Yin, Chao Zhao, Wenwu Wang
Format: Article
Language:English
Published: IEEE 2021-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Reliability
negative-bias temperature instability (NBTI)
Si p-FinFETs
post-metallization annealing
ALD W gate-filling metal
trap generation
Online Access:https://ieeexplore.ieee.org/document/9349750/

Internet

https://ieeexplore.ieee.org/document/9349750/

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