A High-Throughput FPGA Architecture for Joint Source and Channel Decoding

A High-Throughput FPGA Architecture for Joint Source and Channel Decoding

In the wireless transmission of multimedia information, the achievable transmission throughput and latency may be limited by the processing throughput and latency associated with source and channel coding. Ultra-high throughput and ultra-low latency processing of source and channel coding are requir...

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Bibliographic Details
Main Authors: Matthew F. Brejza, Robert G. Maunder, Bashir M. Al-Hashimi, Lajos Hanzo
Format: Article
Language:English
Published: IEEE 2017-01-01
Series:IEEE Access
Subjects:
Turbo codes
combined source-channel coding
channel coding, decoding
field programmable gate arrays
throughput
wireless communication
Online Access:https://ieeexplore.ieee.org/document/7762139/

Internet

https://ieeexplore.ieee.org/document/7762139/

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