POWER GATED TECHNIQUE TO IMPROVE DESIGN METRICS OF 6T SRAM MEMORY CELL FOR LOW POWER APPLICATIONS
The SRAM is used in almost every portable device and consumes a considerate amount of device size. Lowering the power dissipation and size of the SRAM memory cell will ultimately lower the average power consumption and size of the digital system. Device scaling is generally used for decreasing t...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
ICT Academy of Tamil Nadu
2019-10-01
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| Series: | ICTACT Journal on Microelectronics |
| Subjects: | |
| Online Access: | http://ictactjournals.in/paper/IJME_Vol_5_Iss_3_Paper_3_815_819.pdf |