Energy Efficiency Effects of Vectorization in Data Reuse Transformations for Many-Core Processors—A Case Study †

Thread-level and data-level parallel architectures have become the design of choice in many of today’s energy-efficient computing systems. However, these architectures put substantially higher requirements on the memory subsystem than scalar architectures, making memory latency and bandwidth critica...

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Bibliographic Details
Main Authors: Abdullah Al Hasib, Lasse Natvig, Per Gunnar Kjeldsberg, Juan M. Cebrián
Format: Article
Language:English
Published: MDPI AG 2017-02-01
Series:Journal of Low Power Electronics and Applications
Subjects:
KNL
Online Access:http://www.mdpi.com/2079-9268/7/1/5