Characterization and Compact Modeling of Nanometer CMOS Transistors at Deep-Cryogenic Temperatures

Characterization and Compact Modeling of Nanometer CMOS Transistors at Deep-Cryogenic Temperatures

Cryogenic characterization and modeling of two nanometer bulk CMOS technologies (0.16-μm and 40-nm) are presented in this paper. Several devices from both technologies were extensively characterized at temperatures of 4 K and below. Based on a detailed understanding of the device physics...

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Bibliographic Details
Main Authors: Rosario M. Incandela, Lin Song, Harald Homulle, Edoardo Charbon, Andrei Vladimirescu, Fabio Sebastiano
Format: Article
Language:English
Published: IEEE 2018-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Cryogenic electronics
CMOS
cryogenic
cryo-CMOS
characterization
modeling
Online Access:https://ieeexplore.ieee.org/document/8329135/

Internet

https://ieeexplore.ieee.org/document/8329135/

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