Nonvolatile Spintronic Memory Array Performance Benchmarking Based on Three-Terminal Memory Cell

• Main Authors: Chenyun Pan, Azad Naeemi
• Format: Article
• Language: English
• Published: IEEE 2017-01-01
• Series: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
• Subjects: Domain wall (DW); magnetoelectric (ME); performance modeling; read disturb rate; spin diffusion (SD); spin Hall effect (SHE)
• Online Access: https://ieeexplore.ieee.org/document/7856892/

For the conventional spin-transfer torque random access memory, tradeoffs exist between read margin and write energy because both read and write currents pass through the same magnetic tunnel junction. To improve the read/write performance and reduce the read disturb rate, three-terminal memory cell structures are investigated and the tradeoffs among read and write performance metrics are explored. A uniform memory array-level benchmarking is performed to compare various spintronic write mechanisms, including spin diffusion, spin Hall effect, domain wall motion, and magnetoelectric (ME) effect. Results show that three-terminal memory cells have the advantage of a small write energy dissipation, and up to two orders of magnitude reduction in the energy-delay product is projected for the domain wall and ME-based memory cells.