Design an Improved Structure for 10-Bit Pipeline Analog to Digital Converter Based on 0.18µm CMOS Technology
This paper proposed a novel structure of a 10-bit, 400MS/s pipelined analog to digital convertor using 0.18 µm TSMC technology. In this paper, two stages are used to converter design and a new method is proposed to increase the speed of the pipeline analog to digital convertor. For this purpose, the...
Main Authors: | , , |
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Format: | Article |
Language: | English |
Published: |
Sciendo
2019-12-01
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Series: | Journal of Applied Engineering Sciences |
Subjects: | |
Online Access: | https://doi.org/10.2478/jaes-2019-0023 |