Instruction-level Real-time Secure Processor Using an Error Correction Code
In this paper, we present a processor that detects security-attacks at the instruction level by checking the integrity of instructions in real time. To confirm the integrity of the instructions, we generate a parity chain of instructions and check them at run time. The parity chain is generated u...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Stefan cel Mare University of Suceava
2015-08-01
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| Series: | Advances in Electrical and Computer Engineering |
| Subjects: | |
| Online Access: | http://dx.doi.org/10.4316/AECE.2015.03002 |