Minimization of Network Induced Jitter Impact on FPGA-Based Control Systems for Power Electronics through Forward Error Correction

Minimization of Network Induced Jitter Impact on FPGA-Based Control Systems for Power Electronics through Forward Error Correction

In modular distributed architectures, the adoption of a communication method that is at the same time robust and has a low and predictable latency is of utmost importance in order to support the required system dynamics. The aim of this paper is to evaluate the consequences of the random jitter on m...

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Bibliographic Details
Main Authors: Valentina Bianchi, Filippo Savi, Ilaria De Munari, Davide Barater, Giampaolo Buticchi, Giovanni Franceschini
Format: Article
Language:English
Published: MDPI AG 2020-02-01
Series:Electronics
Subjects:
modular power converters
field programmable gate array (fpga)
faulttolerance
error correction codes
digital communications
Online Access:https://www.mdpi.com/2079-9292/9/2/281

Internet

https://www.mdpi.com/2079-9292/9/2/281

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