Analysis of Adiabatic Hybrid Full Adder and 32-Bit Adders for Portable Mobile Applications
In VLSI, power optimization is the main criteria for all the portable mobile applications and developments because of its impact on system performance. The performance of an adder has significant impact on overall performance of a digital system. Adiabatic logic (AL), a new emerging research domain...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
International Association of Online Engineering (IAOE)
2020-04-01
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| Series: | International Journal of Interactive Mobile Technologies |
| Subjects: | |
| Online Access: | https://online-journals.org/index.php/i-jim/article/view/13343 |