Low power domino logic circuits in deep-submicron technology using CMOS
Leakage power and propagation delay are the two major challenges in designing CMOS VLSI circuits, in deep sub-micron technology. This paper proposes a novel technique: Foot Driven Stack Transistor Domino Logic (FDSTDL) for designing CMOS domino logic gates for the reduction in leakage power and impr...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2018-08-01
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| Series: | Engineering Science and Technology, an International Journal |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S2215098617316257 |