Minimization of Output Voltage Ripple of Two-Phase Interleaved Buck Converter with Active Clamp

Minimization of Output Voltage Ripple of Two-Phase Interleaved Buck Converter with Active Clamp

A control technique combining pulse width modulation (PWM) and pulse amplitude modulation (PAM) is presented herein to reduce the output voltage ripple of the converter as little as possible. Such a converter requires a two-stage cascaded structure. The first stage is the buck-boost converter, which...

Full description

Bibliographic Details
Main Authors: Yeu-Torng Yau, Kuo-Ing Hwu, Jenn-Jong Shieh
Format: Article
Language:English
Published: MDPI AG 2021-08-01
Series:Energies
Subjects:
active clamp
buck converter
current sharing
FPGA
fully-digitalized
output voltage ripple
Online Access:https://www.mdpi.com/1996-1073/14/16/5215

Internet

https://www.mdpi.com/1996-1073/14/16/5215

Similar Items