An Efficient Degraded Deductive Fault Simulator for Small-Delay Defects

• Main Authors: Tieqiao Liu, Ting Yu, Shuo Wang, Shuo Cai
• Format: Article
• Language: English
• Published: IEEE 2020-01-01
• Series: IEEE Access
• Subjects: Circuit faults; fault simulation; small-delay defects; deductive simulation; fault effects re-convergence
• Online Access: https://ieeexplore.ieee.org/document/9256321/

An efficient degraded deductive simulator for small delay defects is proposed. The proposed method takes into account the conditions of re-convergence sensitization and hazard-based detection, providing fast and accurate simulation results for small delay defects. Separate simulation strategies for faults with different fault effects are proposed. For faults on fault effects re-convergent fan-out stems, the serial simulation technique is applied. For other faults, a deductive simulation technique is proposed to accelerate the simulation. Different from previous works, serial simulations are carried out no longer for all faults on fan-out re-convergent stems, but only for fault effects re-convergences, and the other faults are parallel simulated with the degraded deductive technique, which eliminates “AND” operation and the propagation of fault-list is simpler than conventional deductive ones. Experimental results demonstrate that the proposed simulator that can further accelerate the fault simulation in efficiency. It achieves a 28.3X speedup on average compared with the serial simulation method, and a 3.92X speedup on average compared with the critical path tracing based method.