Embedded FPGA Design for Optimal Pixel Adjustment Process of Image Steganography
We propose a prototype of field programmable gate array (FPGA) implementation for optimal pixel adjustment process (OPAP) algorithm of image steganography. In the proposed scheme, the cover image and the secret message are transmitted from a personal computer (PC) to an FPGA board using RS232 interf...
| Main Authors: | , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Hindawi Limited
2018-01-01
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| Series: | Mathematical Problems in Engineering |
| Online Access: | http://dx.doi.org/10.1155/2018/5216029 |