Statistical Traffic Properties and Model Inference for Shared Cache Interface in Multi-Core CPUs

Statistical Traffic Properties and Model Inference for Shared Cache Interface in Multi-Core CPUs

The general-purpose networks-on-chip (GP-NoC) has recently attracted the attention of the research and industry as a way to support the growing demands of computing systems. The design and the development of the communications and networking functions for such a large-scale versatile systems require...

Full description

Bibliographic Details
Main Authors: Dmitri Moltchanov, Alexander Antonov, Arkady Kluchev, Karolina Borunova, Pavel Kustarev, Vitaly Petrov, Yevgeni Koucheryavy, Alexey Platunov
Format: Article
Language:English
Published: IEEE 2016-01-01
Series:IEEE Access
Subjects:
Microprocessors
communication system traffic
cache memory
modeling
Online Access:https://ieeexplore.ieee.org/document/7552458/

Internet

https://ieeexplore.ieee.org/document/7552458/

Similar Items