Implementation of Different Variants of Table-Based Frequency Synthesizers with Quadrature Output in VHDL

Implementation of Different Variants of Table-Based Frequency Synthesizers with Quadrature Output in VHDL

This article describes the modelling and implementation of two different variants of direct frequency synthesizer, and evaluation of the performance of the finished design, in terms of memory and speed efficiency. The frequency synthesizer requirement comes from our complex radio transmission system...

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Bibliographic Details
Main Authors: Daniel Kekrt, Milos Klima, Radek Podgorny, Jan Zavrtalek
Format: Article
Language:English
Published: VSB-Technical University of Ostrava 2012-01-01
Series:Advances in Electrical and Electronic Engineering
Subjects:
direct frequency synthesis
vhdl
fpga
memory efficiency
logic synthesis.
Online Access:http://advances.utc.sk/index.php/AEEE/article/view/531

Internet

http://advances.utc.sk/index.php/AEEE/article/view/531

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