Development of a high-performance readout circuit for photoelectric detectors
A high-performance readout circuit for photoelectric detectors is developed in this paper to achieve high-speed low-noise image detection. Here, the W/L ratio of the first-stage P-type following transistor is reduced to decrease the parasitic capacitance of buses, and the bias voltage of the P-type...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
AIP Publishing LLC
2020-10-01
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| Series: | AIP Advances |
| Online Access: | http://dx.doi.org/10.1063/5.0023944 |