FPGA Implementation of RSA Public-Key Cryptographic Coprocessor
The hardware implementation of the RSA algorithm for public-key cryptography is presented. The algorithm is dependent on the computation of modular exponentials. Critical to this computation is a fast implementation of modular multiplications. A high-performance systolic array architecture for modul...
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
2000-09-24.
|
| Subjects: | |
| Online Access: | Get fulltext |