Systolic array architecture and its application in finite impulse response filter design
This project presents the methodology involved in mapping a computing algorithm onto Systolic Array (SA) architecture and its implementation in designing a high computational throughput Finite Impulse Response (FIR) filter. As in many applications of Digital Signal Processing (DSP), FIR filtering re...
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| Format: | Thesis |
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2013-01.
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| Online Access: | Get fulltext |