High speed - energy efficient successive approximation analog to digital converter using tri-level switching
This thesis reports issues and design methods used to achieve high-speed and high-resolution Successive Approximation Register analog to digital converters (SAR ADCs). A major drawback of this technique relates to the mismatch in the binary ratios of capacitors which causes nonlinearity. Another iss...
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| Format: | Thesis |
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2015-11.
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| Online Access: | Get fulltext |