Defects reduction of Ge epitaxial film in a germanium-on-insulator wafer by annealing in oxygen ambient

A method to remove the misfit dislocations and reduce the threading dislocations density (TDD) in the germanium (Ge) epilayer growth on a silicon (Si) substrate is presented. The Ge epitaxial film is grown directly on the Si (001) donor wafer using a "three-step growth" approach in a reduc...

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Bibliographic Details
Main Authors: Lee, Kwang Hong (Author), Bao, Shuyu (Author), Chong, Gang Yih (Author), Tan, Yew Heng (Author), Fitzgerald, Eugene A. (Contributor), Tan, Chuan Seng (Author)
Other Authors: Massachusetts Institute of Technology. Department of Materials Science and Engineering (Contributor)
Format: Article
Language:English
Published: American Institute of Physics (AIP), 2016-05-23T01:29:33Z.
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Online Access:Get fulltext
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042 |a dc 
100 1 0 |a Lee, Kwang Hong  |e author 
100 1 0 |a Massachusetts Institute of Technology. Department of Materials Science and Engineering  |e contributor 
100 1 0 |a Fitzgerald, Eugene A.  |e contributor 
100 1 0 |a Fitzgerald, Eugene A.  |e contributor 
700 1 0 |a Bao, Shuyu  |e author 
700 1 0 |a Chong, Gang Yih  |e author 
700 1 0 |a Tan, Yew Heng  |e author 
700 1 0 |a Fitzgerald, Eugene A.  |e author 
700 1 0 |a Tan, Chuan Seng  |e author 
245 0 0 |a Defects reduction of Ge epitaxial film in a germanium-on-insulator wafer by annealing in oxygen ambient 
260 |b American Institute of Physics (AIP),   |c 2016-05-23T01:29:33Z. 
856 |z Get fulltext  |u http://hdl.handle.net/1721.1/102591 
520 |a A method to remove the misfit dislocations and reduce the threading dislocations density (TDD) in the germanium (Ge) epilayer growth on a silicon (Si) substrate is presented. The Ge epitaxial film is grown directly on the Si (001) donor wafer using a "three-step growth" approach in a reduced pressure chemical vapour deposition. The Ge epilayer is then bonded and transferred to another Si (001) handle wafer to form a germanium-on-insulator (GOI) substrate. The misfit dislocations, which are initially hidden along the Ge/Si interface, are now accessible from the top surface. These misfit dislocations are then removed by annealing the GOI substrate. After the annealing, the TDD of the Ge epilayer can be reduced by at least two orders of magnitude to <5 × 10[superscript 6] cm[superscript −2]. 
520 |a Singapore. National Research Foundation (Singapore-MIT Alliance for Research and Technology) 
546 |a en_US 
655 7 |a Article 
773 |t APL Materials