Adaptive Scheduling for Systems with Asymmetric Memory Hierarchies

Conventional multicores rely on deep cache hierarchies to reduce data movement. Recent advances in die stacking have enabled near-data processing (NDP) systems that reduce data movement by placing cores close to memory. NDP cores enjoy cheaper memory accesses and are more area-constrained, so they u...

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Bibliographic Details
Main Authors: Tsai, Po-An (Author), Chen, Changping (Author), Sanchez, Daniel (Author)
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science (Contributor)
Format: Article
Language:English
Published: Institute of Electrical and Electronics Engineers (IEEE), 2020-11-25T15:19:42Z.
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