First Demonstration of a Self-Aligned GaN p-FET

• Main Authors: Chowdhury, Nadim (Author), Xie, Qingyun (Author), Yuan, Mengyang (Author), Rajput, Nitul S. (Author), Xiang, Peng (Author), Cheng, Kai (Author), Then, Han Wui (Author), Palacios, Tomas (Author)
• Other Authors: Massachusetts Institute of Technology. Microsystems Technology Laboratories (Contributor)
• Format: Article
• Language: English
• Published: Institute of Electrical and Electronics Engineers (IEEE), 2021-12-10T21:52:10Z.
• Subjects: Article
• Online Access: Get fulltext

 In this work, we demonstrate a self-aligned p-FET with a GaN/Al0 2Ga0 8N (20 nm)/GaN heterostructure grown by metal-organic-chemical vapor deposition (MOCVD) on Si substrate. Our 100 nm channel length device with recess depth of 70 nm exhibits a record ON-resistance of 400 Ωmm and ON-current over 5 mA/mm with ON-OFF ratio of 6×105 when compared with other p-FET demonstrations based on GaN/AlGaN heterostructure. The device shows E-mode operation with a threshold voltage of -1 V, making it a promising candidate for GaN-based complementary circuit that can be integrated on a Silicon platform. A monolithically integrated n-channel transistor with p-GaN gate is also demonstrated. The potential of the reported p-FET for complementary logic application is evaluated through industry-standard compact modeling and inverter circuit simulation.